The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2000

Filed:

Nov. 12, 1996
Applicant:
Inventors:

Terrel L Morris, Garland, TX (US);

Douglas S Ondricek, Dallas, TX (US);

Assignee:

Hewlett-Packard Company, Palto Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324755 ; 324765 ;
Abstract

A system and method of constructing and using a test module in situations where internal access to test points on a substrate are unavailable because devices mounted on the substrate block physical access. The test module is itself a solderable substrate and is imposed, for testing purposes, between the main substrate and the mounted devices. For double-sided or stacked main boards, two or more such modules can be used interposed between the mounted devices and the main substrate. Vias in the module serve to make contact with the test points and to carry the signals to the edge of the module where cups can be formed by cutting the edge vias in half.


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