The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2000

Filed:

Mar. 22, 1999
Applicant:
Inventors:

Kevin J Jurek, Gilbert, AZ (US);

William O Mathes, Tempe, AZ (US);

Lalit O Patel, Mesa, AZ (US);

Assignee:

Motorola, Inc., Schaunburg, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
323312 ; 323313 ;
Abstract

A method and apparatus for controlling current flow in current sources includes a current source FET (18), a control FET (20), and a driver circuit which includes complementary logic (310). The use of complementary logic for control advantageausly allows commonly available logic functions to control the current flow in individual current sources while maintaining a substantially constant bias voltage on the gate of the current source FETs. A chip-wide bias generator can be maintained substantially constant while controlling individual current sources.


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