The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2000
Filed:
Oct. 24, 1997
Gary C Adishian, Scottsville, NY (US);
ENI Technologies, Inc., Rochester, NY (US);
Abstract
A high-power high-voltage transistor has four or more semiconductor dies mounted in thermal contact on a metal flange. Each die has a flat lower surface with a drain (collector) region formed over at least 80 percent of its lower surface. A gate (base) region and a source (emitter) region are formed respectively on upper surfaces of the die. The drain region is seated in direct electrical and thermal contact with the flange, so that the flange serves as a drain lead for the transistor die. The die has a drain-source breakdown voltage or collector-emitter breakdown voltage) on the order of one kilovolt or higher and an area of one hundred thousand square mils or larger. Molybdenum tabs between the drain (collector) region and the flange protect the die from thermally-induced stresses. The dies can be MOSFET power transistors, bipolar junction transistors or other solid-state devices. An oval lead frame can be employed for connecting to the source regions. A carousel arrangement carries an array of chips on a circular flange. The transistor can be implemented as a DC grounded drain, RF common source amplifier circuit. The gate-source input can float, allowing the drain to be DC and thermally grounded. The RF current path is conventional common source (emitter).