The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2000

Filed:

Jul. 16, 1998
Applicant:
Inventors:

Takahiko Watanabe, Tokyo, JP;

Osamu Sukegawa, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438 30 ; 438158 ; 438160 ;
Abstract

In a large-sized liquid crystal display panel formed through multiple time exposure using a single mask, the storage capacity between a gate and a source of TFT is adjusted by making an offset for exposure at the exposure connecting portion to decrease variations in the feedthrough voltage in a screen. Further, by preparing the layout of an exposure mask such that the overlap area between a gate signal wire or a storage wire and a pixel electrode is made smaller the farther the overlap area is from a gate signal input part. By making the overlap area smaller, the storage capacity is made smaller, which decreases the variation of the feedthrough voltage in the single exposure area.


Find Patent Forward Citations

Watanabe, Takahiko. (2000). Method for manufacturing thin film transistor array substrate (U.S. Patent No. 6020214). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6020214

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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