The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2000
Filed:
Dec. 09, 1997
Otomar Schmidt, Richmond Heights, OH (US);
Richard S Gunsaulus, Highland Heights, OH (US);
Ronald E Schultz, Solon, OH (US);
Jeffery W Brooks, Mentor-On-The-Lake, OH (US);
Allen-Bradley Company, LLC, Milwaukee, WI (US);
Abstract
An integrated RISC and relay ladder logic processor uses shared registers, program counter, bus lines, and processing circuitry to eliminate delays associated with transfer of control in co-processor type architecture. The RISC instructions do not significantly interfere with the specialized hardware needed for rapid relay logic execution, the latter which may be further improved through the use of a pipeline well suited for relay ladder logic which creates few pipeline hazards. Two levels of condition codes are used for the arithmetic and logic instructions to permit nested arithmetic operations without interference with those instructions visible to the user. Hybrid instructions are provided to synchronize the relay ladder instructions with the arithmetic instructions, thus truly integrating the two instruction sets.