The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2000

Filed:

Jun. 24, 1999
Applicant:
Inventors:

James A Komarek, Newport Beach, CA (US);

Jack L Minney, Irvine, CA (US);

Stephen P Nordine, Santa Ana, CA (US);

Harold F Lewis, Villa Park, CA (US);

Richard Wada, Santa Ana, CA (US);

John F Stockman, Costa Mesa, CA (US);

Assignee:

Creative Integrated Systems, Santa Ana, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F / ;
U.S. Cl.
CPC ...
315194 ; 315224 ; 315291 ; 3311 / ; 3311 / ;
Abstract

A small and economically fabricated CMOS voltage controlled crystal oscillator is provided by coupling three inverter amplifiers in series with a regenerative crystal controlled feedback loop. The first and second CMOS inverters have output nodes whose impedances are modified by a CMOS impedance modulating circuit. Also coupled to each of these two output nodes is a CMOS transistor shunt capacitor. The impedance of the output node is modified according to the magnitude of a voltage control signal applied to the CMOS modulating circuits. The self-bias of the modulating circuits is maintained substantially constant by adjusting the gate drive in each of the modulating circuits according to gate drives derived from a dummy modulating circuit. The dummy modulating circuit has as one input the voltage control signal and as its compensating gate drive, a control signal derived from a feedback loop from a dummy output node in such a manner that the self-bias of the dummy modulating circuit is maintained substantially constant. The compensating gate drive from the dummy modulating circuit is then coupled to the appropriate compensating gates within the impedance modulating circuits in the voltage controlled oscillator.


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