The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 25, 2000

Filed:

Jul. 17, 1998
Applicant:
Inventors:

Chiu H Ting, Saratoga, CA (US);

William H Holtkamp, San Jose, CA (US);

Assignee:

Cutek Research, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438689 ; 156345 ;
Abstract

An apparatus and method for providing an integrated processing system allowing for the isolation of non-compatible processes used to deposit a material onto a semiconductor wafer and/or remove material from a wafer is described. The integrated processing system of the present invention is comprised of a first processing chamber for processing a substrate in a first environment coupled to a second processing chamber for processing a substrate in a second environment. A connecting interface coupled to the first and second processing chambers allows the first and second processing chambers to be isolated from each other as needed. Further, the connecting interface allows a wafer to be transferred from the first processing chamber to the second processing chamber within a controlled environment. The first and second processing chambers may be or may include cluster tools.


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