The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 11, 2000
Filed:
Dec. 16, 1998
Bradley J Suppanz, Mountain View, CA (US);
Aaron J Mendelsohn, Campbell, CA (US);
Michael J McVey, Palo Alto, CA (US);
Space Systems/Loral, Inc., Palo Alto, CA (US);
Abstract
A system for managing the operation of a battery such as a lithium ion battery having a plurality of serially connected individual cells comprises a bypass module electrically in parallel with each individual cell or, alternatively, with at least one of the cells or alternatively again with an individual cell and its associated grouping of one or more parallel cells. The module includes a sensor for detecting an operating condition of its associated cell and a charger operable for charging the cell. A charge controller is electrically connected with each bypass module and is operable in response to an operating condition of a cell detected by the sensor which is outside a predetermined range of magnitudes to change the bypass module to the conductive mode and thereby shunt current around the battery cell, while leaving unaffected each of the remaining cells. The charge controller includes a processor with mode selecting means for initiating operation of the charger for charging each of the plurality of cells, and a capability for establishing voltage and current set points for each of the bypass modules to thereby prevent overcharging of each associated cell. The processor is also operable for performing a multi step charge profile for each of the bypass modules such that when a predetermined voltage is achieved at the conclusion of a step, a subsequent step is performed at a reduced charge current until a final predetermined voltage is achieved at a charge current which has been reduced to zero.