High speed translation lookaside buffer employing content address memory

Abstract

A translation lookaside buffer (TLB) for use of a microprocessor, using a content address memory (CAM), includes a block for generating a control clock for precharging a clock and an enable clock for driving data; a CAM block for comparing a linear address with stored data and generating hit signals representing whether or not its comparison result is a coincidence therebetween; a block for decoding the linear address applied from the outside, the linear address being for a distinction of respective entries; a hit signal generating block for outputting selection signals indicating where the hit signals inputted from the CAM block are generated; a block for storing a physical address; a block for selecting one out of the physical addresses outputted from each area of the storing block in response to the selection signal provided from the hit signal generating block; and a block for sensing a signal applied from the selection block.