The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2000

Filed:

Oct. 30, 1997
Applicant:
Inventor:

Hans A Wiggers, Saratoga, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365 63 ; 36523003 ;
Abstract

A memory system for minimizing the capacitive load of the memory data bus. The invention provides a digital memory system including a controller, a data bus in electrical communication with the controller, and memory devices. The controller operates to selectively couple one of the memory devices to the data bus when accessing a memory location in that memory device and to decouple that memory device from the data bus at other times. This selective coupling of the memory devices minimizes capacitive loading of the data bus. A method according to the includes establishing an electrical connection between one of the memory devices and the external circuit in response to a request from the external circuit to access a memory location in the memory device. Next, the requested access to the memory location is provided. Then the electrical connection between the memory device and the external circuit is broken after the access has been completed, thereby reducing capacitive loading of the external circuit.


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