The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 04, 2000

Filed:

Nov. 19, 1997
Applicant:
Inventors:

Fumiaki Mizuno, Nagoya, JP;

Takashi Hoshino, Nagoya, JP;

Motonori Kido, Nagoya, JP;

Yoshiyuki Miyazaki, Nagoya, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ; H02H / ;
U.S. Cl.
CPC ...
327108 ; 327321 ; 327434 ; 361 96 ; 361 98 ;
Abstract

A microcomputer 4 responds to an instruction signal to turn the load L on or off to control the FET 2 through the drive circuit 5. The microcomputer 4 samples an electric current I.sub.L which is supplied through the A/D converter 6 and which flows in the load L at every predetermined sampling time T.sub.S and subjects the sampled electric current I.sub.L to a comparison with a known rated current value I.sub.R for the load L. When I.sub.L .gtoreq.I.sub.R is satisfied, the microcomputer 4 starts counting energizing time T. When the accumulated value of I.sub.L .times.T.sub.S is enlarged to a predetermined value S.sub.O, the microcomputer 4 turns the FET 2 off. When the detected electric current I.sub.L is larger than an upper limit I.sub.O (>I.sub.R) determined previously, the microcomputer 4 immediately turns the FET 2 off through the drive circuit 5.


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