The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1999

Filed:

Feb. 10, 1998
Applicant:
Inventor:

Takatoshi Ishii, Sunnyvale, CA (US);

Assignee:

S3 Incorporated, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G / ;
U.S. Cl.
CPC ...
345150 ; 345147 ; 345149 ; 345199 ; 358455 ; 358457 ;
Abstract

A flat-panel display controller generates signals to cause display of images on TFT and STN type flat-panel displays. The display controller includes dither logic and frame rate control logic. The dither logic performs dynamic and distributed dithering on pixel data to generate smooth 16 gray-shade images on the display. The dynamic and distributed dithering capabilities are programmable. Dynamic dithering is programmable to specify, two-phase, four-phase or eight-phase mixes.to generate signals for use by TFT and STN type flat-panel displays. The frame rate control logic is responsive to the dither logic and performs frame rate control on the dithered signals using stored values indicative of average pixel luminescence to generate 256 gray-shades.


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