The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1999

Filed:

Feb. 27, 1998
Applicant:
Inventors:

Eng Han Lee, Singapore, SG;

Yung Yum Ang, Singapore, SG;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03B / ;
U.S. Cl.
CPC ...
327122 ; 327116 ; 327119 ; 327284 ;
Abstract

This invention describes a circuit and method for creating a double clock frequency. The circuit uses a sequence of delay elements to delay the primary clock. A delay detector determines when a delayed clock is out of phase with the primary clock. A delay is selected that is one half the delay producing the out of phase delayed clock. The selected delay is used to combine with the primary clock to produce a double clock frequency. Control signals for selecting the 'half' delayed clock are latched to prevent clock jitter and spurious signal from producing error signals in the double frequency clock. Different duty cycles can be established by varying the selected delay.


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