The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1999

Filed:

Aug. 20, 1997
Applicant:
Inventor:

Hidehiko Kuroda, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
324537 ; 327 47 ; 324 7672 ;
Abstract

For testing a frequency divider, oscillations are produced and wave-shaped into a series of dock pulses. The dock pulses are supplied to a frequency divider under test. A window pulse of duration equal to one cycle of the output pulses of the frequency divider is used to sample the clock pulses. The sampled clock pulses are counted and compared with a reference value. Depending on the number of the sampled clock pulses relative to the reference value, an output voltage at one of two discrete values is produced to indicate the result of the test.


Find Patent Forward Citations

Kuroda, Hidehiko. (1999). Frequency divider testing circuit clock-sampling window variable with (U.S. Patent No. 6008655). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6008655

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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