The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 28, 1999
Filed:
Sep. 29, 1995
Ramesh G Mani, Stuttgart, DE;
K von Kltizing, Stuttgart, DE;
R.G. Mani ('Mani'), Stuttgart, DE;
Abstract
A multi-current technique for offset reduction in Hall elements is extended in order to separate a piezoresistive voltage, from a Hall voltage, in similar Hall and piezoresistive devices based on a semiconductor such as, for example, Silicon. In a special embodiment, this offset compensation method exploilts directional averaging using biaxial, quadruple current injection from four electrically separate current sources, in order to obtain in-situ cancellation of the off-diagonal piezoresistive voltage that is generated across Hall voltage contacts upon the application of simple shear stress. The technique indicates the possibility of Si-based Hall elements with field-equivalent offsets well below 1milliTesla, even in devices based on (001) Silicon with current injection in the [110] type directions. Simple methods for realizing multiple sources are also discussed, some of which are based on photovoltaic effects.