The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1999

Filed:

Sep. 30, 1998
Applicant:
Inventors:

John W Vilkinofsky, Columbus, OH (US);

Shinichi Kubozuka, Ota, JP;

Yasunobu Onozato, Kiryu, JP;

Kiyohumi Nakayama, Azuma-mura, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05B / ;
U.S. Cl.
CPC ...
315 82 ; 315D / ; 307 108 ;
Abstract

A protection circuit prevents, from a short load, excessive current flow through a field effect transistor that delivers current to a daytime running light on a vehicle. The present invention uses commonly available devices, such as resistors and transistors, and a low number of such devices for low cost. Furthermore, the present invention includes a latching circuit for maintaining the switching transistor to be turned off once the current level through the switching transistor reaches an excessive level to prevent the daytime running light from flashing on and off. A voltage, which develops across a resistor that is coupled to the field effect transistor, is an indication of the current level through the field effect transistor. This voltage turns on a first transistor which couples the gate of the field effect transistor to a ground node when the current level through the field effect transistor is greater than a predetermined level. The field effect transistor turns off when the gate of the field effect transistor is coupled to the ground node to prevent excessive current flow through the field effect transistor. A second transistor is configured in a latching configuration with the first transistor to maintain the first transistor to be turned on once the current level through the field effect transistor is greater than a predetermined level and until the power source is reapplied to the field effect transistor.


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