The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1999

Filed:

Apr. 28, 1998
Applicant:
Inventor:

Takenori Morikawa, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ; H01L / ;
U.S. Cl.
CPC ...
257 85 ; 257 21 ; 257 19 ; 257 98 ; 257103 ; 257435 ; 257436 ;
Abstract

There is provided an optical semiconductor device, including a first semiconductor layer, a first insulating layer formed on the first semiconductor layer, the first insulating layer having a different index of refraction from that of the first semiconductor layer, a highly doped, second semiconductor layer formed on the first insulating layer, a third semiconductor layer formed on the second semiconductor layer, a device isolation region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the first insulating layer, the device isolation region defining a device formation region therein, the device formation region being formed with a recess starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the second semiconductor layer, a second insulating layer covering an inner sidewall of the recess therewith, a multi-layered structure formed within the recess, the multi-layered structure having at least a quantum well layer and a contact layer, a connection region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the second semiconductor layer, a first electrode formed on the connection region, a second electrode formed on the contact layer, and a light-impermeable region having a depth starting at an upper surface of the third semiconductor layer and terminating at an upper surface of the first insulating layer, the light-impermeable region being formed outside the recess. The optical semiconductor device can be fabricated in a planar structure, and has an improved photoelectric transfer efficiency. The optical semiconductor device makes it possible to integrate a light-emitting device and a light-receiving device on a common chip with the devices being optically insulated from each other.


Find Patent Forward Citations

Loading…