The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 1999

Filed:

Dec. 18, 1996
Applicant:
Inventors:

William A Shelly, Phoenix, AZ (US);

Minoru Inoshita, Glendale, AZ (US);

Robert J Baryla, Phoenix, AZ (US);

Assignee:

Bull HN Information Systems Inc., Billerica, MA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
711123 ; 711-3 ; 711118 ; 711119 ; 711121 ; 711122 ; 711123 ; 711126 ; 711128 ; 711135 ; 36518902 ; 36518905 ; 36523003 ; 395293 ; 395280 ; 395308 ; 395872 ; 395871 ;
Abstract

A computer system including a group of CPUs, each having a private cache which communicates with its CPU to receive requests for information blocks and for servicing such requests includes a CPU bus coupled to all the private caches and to a shared cache. Each private cache includes a cache memory and a cache controller including pairs of half-block operand buffers, each divided into quarter block segments. The operand buffer set is coupled to selectively receive, under control of an input multiplexer, requested information blocks from the CPU bus in quarter-block segments and is further coupled to selectively send, under control of an output multiplexer, received quarter-block segments to the CPU and received full blocks to the cache memory.


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