The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 21, 1999

Filed:

Jul. 17, 1996
Applicant:
Inventors:

Thierry Bassi, Liffre, FR;

Claude Rambault, Ostwald, FR;

Assignee:

Thomson multimedia S.A., Courbevoie, FR;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04J / ; H04J / ;
U.S. Cl.
CPC ...
370477 ; 370509 ; 370516 ; 370521 ;
Abstract

The disclosure relates to a method of synchronization of clocks wherein, in a system including a digital decoder of a receiver equipped with a sampling clock and a digital encoder of an transmitter also equipped with a sampling clock, said method includes the following stages: in the transmitter, coding by packets of samples of a signal by time intervals of predetermined duration and triggering of the transmission of a data frame when a packet of data is ready to be sent; in the receiver, detection of start of said frame, and generation of a reference signal following said detection, said reference signal being used to correct the clock of the receiver. Another object of the invention is a method of synchronization of clocks wherein, in a system including a digital decoder of a receiver equipped with a sampling clock and a digital encoder of a transmitter also equipped with a sampling clock, in which the transmitter sends frames containing data packets corresponding to a number known of samples, said method includes the following stages in the receiver: reception of a data frame including a packet of data, decoding of said packet and writing of the decoded data in a memory, reading of said decoded data in said memory at a frequency that is a function of the frequency of said clock of the decoder, comparison at a predetermined time of the occupancy of said memory with respect to a threshold, and correction of said clock of the decoder according to the result of said comparison. The invention is applicable in the field of digital transmission, notably transmissions between digital visiophones.


Find Patent Forward Citations

Bassi, Thierry. (1999). Method and device for synchronizing digital decoder and encoder clocks (U.S. Patent No. 6005872). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6005872

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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