The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 1999
Filed:
Dec. 18, 1997
Ange Aznar, La Colle sur Loup, FR;
Jean Calvignac, La Gaude, FR;
Daniel Orsatti, Cagnes s/Mer, FR;
Dominique Rigal, Nice, FR;
Fabrice Verplanken, La Gaude, FR;
International Business Machines Corporation, Armonk, NY (US);
Abstract
The invention discloses a method and an apparatus for use in high speed networks such as Asynchronous Transfer Mode (ATM) networks providing support for processing multipriority data flows at media speed, the major constraint being to share the storage and the ALU between all the tasks. The invention consists first in grouping the tasks in processes and the processes in set of processes all organized in decreasing order of their priority ; `on the fly`interruption of a lower priority process/set of processes by a higher priority process/set of processes is possible as well as reuse of the shared resources during task void states inactive in a process or between processes. In the preferred embodiment of the invention, the support of the reserved bandwidth and non reserved bandwidth ATM services data flows requires two different groups of processes, the highest priority being for the group of processes serving the reserved bandwidth service. With the principle of the invention when used in network equipment the media speed is sustained and many different network traffics can be simultaneously supported. The apparatus implementing the solution of the invention, allowing sharing of resources saves place and costa by the improved reduced number of sophisticated hardware components such as static memories and programmable logic circuits.