The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 1999

Filed:

Jun. 17, 1998
Applicant:
Inventor:

Shinya Tashiro, Kanagawa, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365203 ; 36518911 ;
Abstract

A semiconductor synchronous dynamic random access memory device has an input/output masking function in a block write mode, plural bit line pairs are concurrently connected to a pair of data lines charged to a power voltage level by a precharge circuit in the input/output masking function so as to prevent memory cells from current flowing out from differential amplifiers, and the precharge circuit has not only p-channel type charging transistors but also n-channel enhancement type charging transistors; even if the bit line pairs are connected to the pair of data lines, the n-channel enhancement type charging transistors supplement the current through the data line pair to the bit line pairs, and prevent potential differences on the bit line pairs from undesirable destruction.


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