The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 1999

Filed:

Jul. 16, 1998
Applicant:
Inventors:

Hiroo Arikawa, Tokyo, JP;

Masaya Maruo, Hyogo-ken, JP;

Assignee:

SOC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 931 ; 361 58 ; 361100 ; 361115 ;
Abstract

An overcurrent protective circuit includes a N-type depletion mode FET, a P-type depletion mode FET, and a switch. The sources of the N-type depletion mode FET and the P-type depletion mode FET are connected to each other. The gate of the N-type depletion mode FET is connected through a resistor to the drain of the P-type depletion mode FET. The gate of the P-type depletion mode FET is connected through a resistor to the drain of the N-type depletion mode FET. The drain of the N-type depletion mode FET is a positive external terminal of the circuit, while the drain of P-type depletion mode FET is a negative external terminal of the circuit. A switch electrically connects and disconnects between the gate of the N-type depletion mode FET and the gate of the P-type depletion mode FET.


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