The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 1999
Filed:
Dec. 02, 1997
Anthony Correale, Jr, Raleigh, NC (US);
James Norris Dieffenderfer, Apex, NC (US);
Trevor Scott Garner, Apex, NC (US);
Ronald William Kohake, Cary, NC (US);
Ketan Vitthal Patel, Cary, NC (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and system for manufacturing integrated circuit devices having multiple memory units embedded therein. Initially, a single reusable configurable test circuit is fabricated within an integrated circuit device. A number and type of each memory unit embedded within the integrated circuit device are then identified. Finally, the single reusable configurable test circuit is configured, in response to the identifying of a number and type of each memory unit, such that only one test circuit is required for use with multiple integrated circuit devices having multiple diverse memory units embedded therein. The single reusable configurable test circuit can be placed within or outside a fixed core of the integrated circuit device. In addition, the single reusable configurable test circuit can include array built-in self test (ABIST) controller which includes a hierarchical memory configuration that includes a state machine, address counter, compare register and data pattern generator.