The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 14, 1999
Filed:
Mar. 29, 1996
Deepak Keshay Pai, Burnsville, MN (US);
General Dynamics Information Systems, Inc., Falls Church, VA (US);
Abstract
A method and apparatus is provided for connecting area grid array semiconductor chips to a printed wire board. A compliant lead matrix includes a carrier and a plurality of conductive leads arranged parallel to one another and secured relative to the carrier in the form of a matrix. The method includes orienting a first side of the lead matrix to be aligned with a reciprocal matrix of conductive surface pads on the area grid array semiconductor chip. First ends of the leads are electrically connected to the conductive surface pads of the area grid array chip. The second side of the lead matrix is oriented to be aligned with a reciprocal matrix of conductive surface pads on a printed wire board. Second ends of the leads of the lead matrix are electrically connected to the conductive surface pads of the printed wire board thereby establishing an electrical connection between the area grid array chip and the printed wire board.