Satellite receiver tuner chip with frequency synthesizer having an

Abstract

The problems outlined above are in large part solved by an improved DBS receiver front end architecture having a tuner chip and a demodulator/decoder chip. The front end includes a frequency synthesizer with an externally configurable charge pump on the tuner chip. The charge pump is coupled to a tank circuit having an adjustable resonance frequency. The resonance frequency can be adjusted over an entire octave by controlling the reverse bias voltage on a pair of varactors. A charge pump with a configurable gain is used to provide a control voltage to the tank circuit to provide a constant phase locked loop response over the frequency range of the tank circuit. Broadly speaking, the present invention concerns a DBS receiver front end which includes a tuner chip and a demodulator/decoder chip. The tuner chip is coupled to receive a receive signal and convert it to a baseband signal. The tuner chip includes an externally configurable charge pump, a tuning oscillator, and a downconverter. The charge pump receives binary inputs indicating a desired gain and responsively amplifies a phase difference signal by the desired gain to provide a correction signal to a loop filter. The loop filter is coupled to adjust a resonance frequency control voltage in a tank circuit according to the correction signal The tuning oscillator oscillates at the resonance frequency of the tank circuit. The downconverter receives a tuning frequency signal provided by the tuning oscillator, and combines it with a receive signal to produce a product signal.