Low-power direct digital frequency synthesizer architecture

Abstract

A direct digital frequency synthesizer for generating a digital sine or cosine function waveform receive digital input. Memory stores digital samples along portions of sine and cosine function waveforms. The memory outputs the digital samples in response to a first portion of the digital input. Control logic is responsive to the digital input and controls the output of the digital samples from the memory to allow digital samples along a complete cycle of the sine or cosine function waveform to be output even though only portions of the sine and cosine function waveforms are stored in the memory. A linear interpolator receives a second portion of the digital input and modifies digital samples output by the memory to generate intermediate digital samples between the digital samples stored in the memory to improve accuracy.