The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 07, 1999

Filed:

Oct. 22, 1998
Applicant:
Inventors:

Chae Gee-Sung, Miyagi-ken, JP;

Kim Jong-Il, Miyagi-ken, JP;

Osamu Yoshida, Miyagi-ken, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438 30 ; 438157 ; 438158 ; 257 59 ; 257 72 ;
Abstract

In a method for making a liquid crystal display device, a first conductive film is formed on a substrate, and patterned to form a gate electrode and a gate line; a gate insulating film for covering the gate electrode and the gate line, a semiconductor film, an impurity-doped semiconductor film, and a second conductive film are continuously formed; the second conductive film and the impurity-doped semiconductor film are patterned using a common mask to form a source electrode, a source line, and a drain electrode from the second conductive film and to form an ohmic contact layer from the impurity-doped semiconductor layer; an insulating film is formed onto at least the source electrode, the source line, the drain electrode, and the semiconductor film; the insulating film, the semiconductor film, and the gate insulating film are patterned using a common mask to form a thin film transistor to be in contact with a pixel electrode; a transparent conductive film is deposited on the non-deposited section of the substrate and patterned to form the pixel electrode; and a liquid crystal is enclosed between the resulting thin film transistor substrate and a counter substrate.


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