The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 1999

Filed:

Jun. 24, 1997
Applicant:
Inventor:

Vladimir Y Volkonsky, Moscow, RU;

Assignee:

Sun Microsystems, Inc., Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
712-1 ; 712 23 ; 712 32 ; 712221 ; 708490 ; 708495 ; 708498 ; 708519 ; 710104 ; 710107 ; 710126 ; 710128 ; 710129 ; 710130 ;
Abstract

An intermediate result signal arising from a manipulation of data signals is checked and reduced without using conditional branches, thereby improving instruction processing. Data signals are represented as signed 8-bit binary values in a two's compliment format. This requires that the intermediate result signal be stored in a register that is greater than 8-bits wide to allow for the proper checking of an overflow condition. A processor operating under program control with the program has the following operations. The program determines whether the intermediate result signal is in a positive overflow state or a negative overflow state. A first mask signal is set to have 8 lower bits in an OFF position when the intermediate result signal is inside the range of a signed 8 bit integer. Otherwise, the first mask signal is set to have 8 lower bits in an ON position. Also, a second mask signal is set to have 8 lower bits in the OFF position when the intermediate result signal is not in the positive or negative overflow state. Otherwise, the second mask signal is set to an upper threshold signal when the data signal is in an overflow state or setting the second mask signal to a lower threshold signal when the data signal is in a negative overflow state. The intermediate result is bitwise ANDed with the first mask signal to obtain a translated data signal, and the translated data signal is bitwise ORed with the second mask signal.


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