The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 1999
Filed:
Jul. 31, 1998
Shinichi Sato, Fukuyama, JP;
Sharp Kabushiki Kaisha, Osaka, JP;
Abstract
A non-volatile semiconductor memory device comprises a plurality of rewritable non-volatile memory cells arranged in an array and divided into a plurality of blocks, the non-volatile memory cells of each block being connected to a bit-line block by block through a bit-line voltage converter which includes a voltage conversion circuit section and a bypass circuit section, wherein when a selection voltage for writing is applied to the bit line extending through a plurality of blocks, the selection voltage is applied as a first voltage to the bit-line within a block which has been selected for writing so as to write data into the non-volatile memory cells connected to the bit-line within the block, and is applied as a second voltage having a smaller absolute value than the first voltage to the bit-line within a block which has not been selected for writing, by means of the voltage conversion circuit section, and when a voltage for reading is applied to the bit-line extending through the plurality of blocks, the voltage is directly applied to the bit line through the bypass circuit section without using the voltage conversion circuit section. According to the present invention, it is possible to prevent drain disturb effectively and to communicate to the plurality of blocks connected to the bit-line by means of the first or second voltage that the selection voltage has been applied to the bit-line for writing.