The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 1999
Filed:
Jun. 23, 1998
Ikuo Wakamatsu, Kanagawa, JP;
Media Technology Corporation, Kanagawa, JP;
Abstract
A switching regulator with its less ripples, less switching loss, and low noise, which is capable of being miniaturized with high efficiency is provided. PWM control signals outputted from a terminal T6 of a pulse width control circuit IC1 are inputted to delay circuits DLa and DLb, respectively. The PWM control signal inputted to the delay circuit DLa, only a rise of which is delayed by a resistor Ra and a capacitor Ca, is applied to a gate of FET Q2 via a wave shaping circuit IC2. On the other hand, the PWM control signal inputted to a delay circuit DLb, only a fall of which is delayed by the resistor Rb and the capacitor Cb, is inverted via a wave shaping circuit IC2 and is applied to a gate of FET Q1 as an inverted control signal. Therefore, FETs Q1 and Q2 are turned ON/OFF in a predetermined period, and a pause period where FETs Q1 and Q2 are turned OFF is only a delayed constant period.