Linearized amplifier core

Abstract

A circuit for linearizing the input/output characteristics of a differential amplifier core circuit is described. The differential amplifier core circuit comprises an input stage, a buffer stage, and an output stage. The input stage includes input transistors connected in a common emitter configuration, where the bases of the input transistors are coupled to input terminals. The input stage further includes load circuits coupled between the input transistors and a power supply terminal. The output stage includes output transistors connected in a common emitter configuration, where the output terminals are coupled to the collectors of the output transistors. First and second resistors are coupled between the collectors of the respective output transistors and the power supply terminal. The buffer stage includes a buffer circuit that is coupled between the input and output stages. The buffer circuit includes a pair of first transistors, each having a base coupled to a collector of the corresponding input transistor, a collector coupled to a power supply terminal, and an emitter coupled to the base of the corresponding output transistor. The buffer circuit further includes a pair of second transistors connected in a common emitter configuration, each having a base coupled to the input terminal, and a collector coupled to the emitter of the corresponding first transistor. A differential current in the first transistors is equal to a differential current in the output transistors, thereby canceling any non-linearity introduced by the output stage.