The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 30, 1999
Filed:
Jan. 28, 1997
Tadao Yamanaka, Tokyo, JP;
Shinichi Nakagawa, Tokyo, JP;
Mitsubishi Denki Kabushiki Kaisha, Tokyo, JP;
Mitsubishi Electric Engineering Co., Ltd., Tokyo, JP;
Abstract
It is an object to obtain a semiconductor device capable of changing a delay time of an output signal of a PLL circuit with respect to an external clock signal after installed in a system. An external clock signal is inputted to an input terminal (1.) An address value is inputted to an input terminal (3.) A decoder (9) selects one of a plurality of delay times in a voltage-controlled oscillator (8) according to the address value. The phase of a signal outputted to an output terminal (2) is delayed with respect to the external clock signal at the input terminal (1) by the delay time selected. Accordingly, it is possible to change the delay time of the output signal of the PLL circuit with respect to the external clock signal after installation in a system.