The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 23, 1999

Filed:

Oct. 09, 1997
Applicant:
Inventors:

Mikio Shiraishi, Yokohama, JP;

Masaki Saitou, Sagamihara, JP;

Yuji Okuda, Tokyo, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
712237 ; 712237 ; 712235 ; 712236 ; 712234 ;
Abstract

Microprocessors use a conditional branch instruction so as to change processing in accordance with conditions. According to the prior art, a NOP instruction, which causes no operation, is used when a condition is satisfied, and the use of the NOP instruction inevitably lengthens the processing time. According to the present invention, a conditional transfer instruction is included in the instruction set of a microprocessor, and a flag decoder is additionally employed. The flag decoder determines whether a condition is satisfied or not, and outputs a control signal on the basis of the determination. The control signal is supplied to the instruction decoder of the processor to make a data transfer operation effective or ineffective. Accordingly, it is not necessary to use a NOP instruction, and the processing time can be as short as possible.


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Shiraishi, Mikio. (1999). Processor (U.S. Patent No. 5991872). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5991872

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