The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 1999
Filed:
Jun. 07, 1994
Steven K Heller, Watertown, MA (US);
Andrew Shaw, Somerville, MA (US);
TM Patents, LP, Boston, MA (US);
Abstract
A system and method for generating a program to enable reassignment of data items among processors in a massively-parallel computer to effect a predetermined rearrangement of address bits. The computer has a plurality of processing elements, each including a memory. Each memory includes a plurality of storage locations for storing a data item, each storage location within the computer being identified by an address, comprising a plurality of address bits having a global portion comprising a processing element identification portion and a local portion identifying the storage location within the memory of the particular processing element. The system generates a program to facilitate use of a predetermined set of tools to effect a reassignment of data items among processing elements and storage location to, in turn, effect a predetermined rearrangement of address bits. The system includes a global processing portion and a local processing portion. The global processing portion generates a global program portion to enable use of the tools to effect a reassignment of data items as among said processing elements to, in turn, effect a rearrangement of the global portion of said address bits. The local processing portion generates a local program portion to enable use of the tools to effect a reassignment of data items as among storage locations within said processing elements to, in turn, effect a rearrangement of the local portion of said address bits.