Clock synchronous memory embedded semiconductor integrated circuit device

Abstract

A semiconductor integrated circuit device includes an SDRAM module operating in synchronization with a clock signal, a logic circuit transmitting data with the SDRAM module for effecting necessary processing, a direct memory access circuit taking in and transferring an externally applied signal in synchronization with the clock signal corresponding to an operation clock of the SDRAM module, and a selector selecting either the output signal of the logic circuit and the output signal of the direct memory access circuit in accordance with a test mode instructing signal for application to the SDRAM module. A test of a synchronous memory can be performed by externally making fast and direct access to the synchronous memory without an influence of a skew in a signal.