The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 1999
Filed:
Nov. 12, 1998
Peter Marconi, Franklin, MA (US);
Theodore W Bilodeau, Concord, MA (US);
Michael John Rigby, Littleton, MA (US);
Nexabit Networks, Inc., Marlborough, MA (US);
Abstract
An electronic circuit board assembly and method that enable close stacking and cooling of closely positioned pluralities of similar electronic I/O or memory boards and requiring high speed communication between the boards, such as high speed switching amongst the I/O terminals of the boards or CPU processing, and having an upper and a lower set of similar spaced groups of closely spaced vertical boards; powering terminals aligned along the upper edges of the upper set of boards, and along the lower edges of the lower set of boards, and terminals for connection with a switching fabric disposed along the lower edges of the upper set of boards and the upper edges of the lower set of boards; power backing planes mounted to power and support the lateral edges of the respective sets of groups of boards and extending across the upper and lower sections of the frame; and a plurality of parallel closely spaced vertical switching fabric boards comprising switching fabric (or CPU processing boards) and centrally mounted in the central space of the frame between the groups of boards of the upper and lower sets of boards, and with a backing plane therefor extending intermediately of the frame between the upper and lower section backing plates and isolatively separate therefrom to provide a no-power quiescent zone for the switching fabric (or CPU) boards.