Motor drive circuit

Abstract

A motor drive circuit 1 is driven by a DC power source 2 connected to power source terminals Tv1, Tv2 and has a first drive transistor Q1 for controlling a drive current supplied to a first terminal Tm1 of a motor from the DC power source 2, a second drive transistor Q2 for supplying current drawn from the first terminal Tm1 of the motor 3 to a ground, a third drive transistor Q3 for controlling a drive current supplied to a second terminal Tm2 of the motor 3 from the DC power source 2, a fourth drive transistor Q4 for drawing current from a second terminal Tm2 of the motor 3, a drive control circuit 4 for controlling the operation of the motor 3 by controlling the drive transistors Q1 through Q4 in response to a first and second control signal supplied to a first and second control terminal Tc1, Tc2, a first control transistor Qc1 having the same polarity as, and connected in parallel to and in the reverse direction of, the second drive transistor Q2 and a second control transistor Qc2 having the same polarity as, and connected in parallel to and in the reverse direction of, the fourth drive transistor Q4. The control transistors limit a decrease in voltage at the first and second terminals Tm1 and Tm2 of the motor 3 generated by a counter-electromotive force of the motor 3, making it possible to clamp the voltage at the terminals at a relatively low level. As a result, a lock-up is prevented even with the use of relatively small-capacity diodes, with the advantage that an IC chip of the motor drive circuit can be reduced further in size.