The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 16, 1999
Filed:
Mar. 20, 1998
Raghu Sastry, Santa Clara, CA (US);
Jeffrey D Larson, San Jose, CA (US);
Albert Mu, Milpitas, CA (US);
John R Slice, Boulder Creek, CA (US);
Richard L Schober, Jr, Cupertino, CA (US);
Thomas M Wicki, Palo Alto, CA (US);
Fujitsu Limited, Kawasaki, JP;
Abstract
A method and apparatus for detecting and isolating an interconnect fault in a packet switched network generates a parity check error code for status messages which are used for flow control in a packet switched network. The packet switched network uses a reverse flow control method wherein status messages are sent locally between adjacent nodes. A receiving node uses status messages to inform an adjacent node of the availability of the input buffers located in the receiving node. Included in the status message is a parity check code that is sent sequentially with the status message using two phases of a clock. The parity check code is a one bit parity check for each bit of the status message. Faults on the local interconnect are detected at the receiving node by performing a one bit parity check on the received status message using the accompanying parity code. Because the status message and the parity check code are transmitted over the same physical bit connections, the one bit parity checks detects any 'stuck at' or 'open' faults in the link.