The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 1999

Filed:

Jan. 09, 1997
Applicant:
Inventors:

David N Goldberg, San Jose, CA (US);

Richard M McClosky, San Jose, CA (US);

Nicholas S Fiduccia, Saratoga, CA (US);

Scott M Dziak, San Jose, CA (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39550015 ; 39550011 ;
Abstract

Connection lines are routed within an integrated circuit. A first set of the connection lines are pre-routed. The first set of connection lines carry signals which have a higher likelihood of being influenced by crosstalk. The first set of connection lines are routed to tracks where minimal capacitive coupling will result. For example, this may be in a track immediately adjacent to a power line or a ground line. Alternatively, or in addition, this may be in a track between two empty tracks. After the first set of connection lines have been routed, a second set of connection lines are routed. The second set of connection lines carry signals which have a lower likelihood of being influenced by crosstalk. The second connection lines are routed to tracks which are not utilized by the first set of connection lines.


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