The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 16, 1999

Filed:

Nov. 04, 1997
Applicant:
Inventor:

Mitsuma Ooishi, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438231 ; 438305 ; 438592 ;
Abstract

After the formation of a gate electrode, thermal oxidation is performed while an area where a source and drain are to be formed is covered with a gate insulating film, impurity ions are then injected to form low-concentration source and drain regions, an insulating spacer is then formed on the side surface of the gate electrode, and an insulating film is deposited on exposed source and drain regions by chemical vapor deposition. This allows the recovery of the breakdown voltage of the gate insulating film, which is damaged by an MOS transistor whose gate electrode contains a high melting-point metal silicide, and prevents metal oxide from being contained in the insulating film on the source and drain regions.


Find Patent Forward Citations

Ooishi, Mitsuma. (1999). Method of fabricating field effect transistor with an ldd structure (U.S. Patent No. 5985712). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5985712

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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