The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 1999
Filed:
Aug. 27, 1997
Ravi Kumar Kolagotla, Breinigsville, PA (US);
Mohit Kishore Prasad, Bethlehem, PA (US);
Lucent Technologies Inc., Murray Hill, NJ (US);
Abstract
In accordance with the present invention, an address arithmetic unit provides a modulo addressing technique for addressing memory locations in a circular buffer. The address arithmetic unit includes a first selector adapted to receive as a first input a value representative of one greater than an ending address, a second input that is a beginning address, and a select input that is the sign of a displacement for stepping through addresses in a circular buffer. The first selector is adapted to select one of its inputs as an output. A first adder combines an address pointer and displacement to produce a first potential next address pointer. A second adder combines the address pointer, the displacement, and a length modified by the sign of the displacement to produce a second potential next address pointer. A sign detector performs a comparison to determine whether a sum of the address pointer, displacement and a negative representation of the first selector output is greater than or equal to zero, or less than zero, and provides an output. A second selector selects one of the first potential next address pointer or the second potential next address pointer as the next address pointer based on the comparator output.