The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 09, 1999
Filed:
Dec. 24, 1997
James Douglas Dworkin, Chandler, AZ (US);
Michael John Torla, Chandler, AZ (US);
Scott Alexander Vanstone, Waterloo, CA;
Motorola, Inc., Schaumburg, IL (US);
Certicom Corp., Mississauga, CA;
Abstract
A finite field inverse circuit (600) for use in an elliptic curve processor (12). The finite field inverse circuit (600) comprises a control circuit (610) and a data circuit (660). The data circuit (610) comprises a data multiplexer (668) for coupling the contents of one of three registers (662, 664, 680) to a finite field arithmetic logic unit (122). A first plurality of bits representing the finite field element to be inverted is initially loaded into a first one of the three registers. The control circuit (660) comprises a shift register (614) suitable for storing a second plurality of bits representing a size of the finite field element to be inverted. Counter and detection circuitry (630) is provided and coupled to the shift register (614) to decrement, shift and detect contents of the shift register (614) that generates control signals (CS1, CS2 and CS3) connected to the control signal inputs (C1, C2 and C3) of the multiplexer (668) of the data circuit (660) in order to cause a series of finite field operations to be performed upon the contents of the three registers (662, 664 and 680) to compute an inverse of the first plurality of bits representing the finite field element.