The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 09, 1999

Filed:

Aug. 25, 1998
Applicant:
Inventors:

Takashi Shoji, Chiba, JP;

Takekazu Sakai, Chichibu, JP;

Assignee:

Showa Denko K.K., Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K / ;
U.S. Cl.
CPC ...
361760 ; 361820 ; 361762 ; 361765 ; 361768 ; 257684 ; 257690 ; 257737 ; 257738 ; 257713 ; 22818022 ;
Abstract

A circuit board mounted with a semiconductor device is fabricated by forming on a silicon substrate at least one first metal layer, overlaying a second metal layer to completely cover the first metal layer, covering the whole surface of the second metal layer with an insulating material, etching the insulating material to open a window at a prescribed region of the surface of the second metal layer, selectively imparting adhesiveness to the portion at the window, adhering solder powder to the adhesive portion, melting the solder powder by heating to form a solder bump, selectively imparting adhesiveness to at least one electrode portion of a wiring board, adhering solder powder to the adhesive portion, melting the adhered solder powder by heating to form a solder bump on the electrode portion, and contacting and fusing the solder bump of the silicon substrate and the solder bump of the wiring board so as to form and maintain a prescribed gap between the silicon substrate and the wiring board.


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