The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 1999

Filed:

Aug. 10, 1998
Applicant:
Inventors:

Satish C Saripella, Starkville, MS (US);

Jeffery Scott Hunt, Ackerman, MS (US);

Sudhaker Reddy Anumula, Sunnyvale, CA (US);

Ajay Srikrishna, Starkville, MS (US);

Assignee:

Cypress Semiconductor Corp., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518905 ; 36518909 ;
Abstract

A circuit comprising a sense amplifier, an evaluation circuit, a control circuit and a register circuit. The sense amplifier circuit may be configured to present a first output and a second output in response to (i) an input signal and (ii) an enable signal. The evaluation circuit may be configured to present an evaluation signal in response to the first and second outputs. The control circuit may be configured to present (i) a first clock signal, a second clock signal and an enable signal in response to (i) the evaluation signal and (ii) a wordline signal. The register circuit may be configured to hold either the first or second output in response to the first and second clock signals. The register circuit may be implemented as a master-slave register that may respond to the first and second clock signals.


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