The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 1999

Filed:

May. 01, 1998
Applicant:
Inventors:

Jonathan William Byrn, Kasson, MN (US);

Chad B McBride, Rochester, MN (US);

Brian Andrew Schuelke, Rochester, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ; H03L / ; H03K / ;
U.S. Cl.
CPC ...
331 / ; 331 25 ; 331 45 ; 331 74 ; 331D / ; 327115 ; 327142 ; 327147 ; 327295 ;
Abstract

A method for removing an external frequency divider and clock formation circuit from a feedback path of a phase locked loop and a phase selector circuit are provided for synchronizing an external frequency divider with a reference clock of a phase locked loop. A reference clock signal is applied to the phase locked loop. An output of the phase locked loop is coupled through a predefined delay and provides a delayed feedback clock signal input to the phase locked loop. The external frequency divider is located at the output of the phase locked loop external to the predefined delay and outside the feedback clock signal path of the phase locked loop. A phase selector circuit identifies a correct phase of the reference clock signal and starts the external frequency divider. The phase selector circuit includes an edge detector, a synchronization divider, and a reset machine.


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