The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 1999

Filed:

Mar. 20, 1997
Applicant:
Inventor:

Kouichi Kimura, Tokyo, JP;

Assignee:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04B / ; H04J / ;
U.S. Cl.
CPC ...
370337 ; 370347 ; 4552491 ; 4552501 ;
Abstract

There are provided a receiver and a transmitter-receiver in which an automatic gain control loop is promptly performed and even in the case of a modulated wave having information in its amplitude, wave distortion can be eliminated. A received signal is received by an antenna and is amplified by a power amplifier. The gain of the received signal is attenuated by a variable attenuator in accordance with an output voltage of a holding circuit. After the signal is converted to an intermediate-frequency signal and amplified through a common procedure and detected, a comparator compares an output signal of the detector and a reference voltage V.sub.ref, and obtains a signal indicating whether the output signal exceeds a reference voltage or a differential voltage therebetween. When the output signal or the differential voltage is brought to a positive level, a timing signal generating section generates a timing signal T.sub.m, and the holding circuit holds a detection signal. In the variable attenuator, the signal is attenuated in accordance with the detection signal. Thereafter, output of the detector is integrated in a time constant circuit, and addition of respective outputs of the time constant circuit and the holding circuit is performed in a computing unit.


Find Patent Forward Citations

Loading…