Apparatus and method for write protecting a programmable memory

Abstract

An apparatus and method for protecting memory content of a programmable memory is disclosed. A programmable memory, such as a random access memory (RAM), is configured to include a write protected portion defined as part of the programmable memory. The write protected memory portion may be configured within the memory space of a single programmable memory, or implemented in a logically or physically separate programmable memory. A microprocessor is coupled to the programmable memory and generates an access code for providing write access to the write protected portion of the programmable memory. A logic circuit, coupled to the programmable memory and microprocessor verifies the access code received from the microprocessor. In response to a verified access code, the logic circuit enables write access to the write protected portion of the programmable memory. In response to an unverified access code, the logic circuit disables write access to the write protected portion of the programmable memory. A timer may be employed to disable write access to the protected memory portion. A power on reset strategy may be employed to reset the logic circuit so as to disable write access to the protected memory portion after reestablishing power following an intended or unintended loss of power. Power may advantageously be applied and removed from the logic circuit and other system components without compromising the integrity of the programs and data stored in the write protected portion of the programmable memory.