The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 1999
Filed:
Mar. 17, 1998
Robert A Stevenson, Canyon Country, CA (US);
Donald K Haskell, Minden, NV (US);
Richard L Brendel, Carson City, NV (US);
Jason Woods, Carson City, NV (US);
Mike Louder, Carson City, NV (US);
Maxwell Energy Products, Inc., San Diego, CA (US);
Abstract
An electromagnetic interference (EMI) filter capacitor assembly is provided for shielding and decoupling a conductive terminal pin or lead of the type used, for example, in an implantable medical device against passage of external interference signals. The EMI filter is constructed of relatively inexpensive ceramic chip capacitors which replace relatively expensive feedthrough capacitors as found in the prior art. The chip capacitors are mounted directly onto a hermetic feedthrough terminal in groups of two or more which vary in physical size, dielectric material and capacitance value so that they self-resonate at different frequencies. This 'staggering' of resonant frequencies and direct installation at the hermetic terminal provides the EMI filter with sufficient broadband frequency attenuation. In one preferred form, multiple chip capacitor groupings are mounted onto a common base structure, with each capacitor grouping associated with a respective terminal pin. In another preferred form, a non-conductive substrate is provided with metalized circuit traces to better accommodate the mounting of the chip capacitors. Additionally, novel chip capacitor geometry/termination-metallization is provided which significantly reduces the internal inductance of the capacitor to improve its high frequency performance as an EMI filter. Such reduced inductance chip capacitor designs are readily adaptable to incorporate multiple electrically isolated active plate sets within a single monolithic casing.