The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 26, 1999

Filed:

Nov. 07, 1997
Applicant:
Inventor:

Mitsuo Ariie, Nagaokakyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03C / ; H03C / ;
U.S. Cl.
CPC ...
332168 ; 332178 ; 455333 ;
Abstract

A low-powered mixer that is operable at a low voltage by a single positive power supply. A predetermined voltage and a first data signal Ss1 superimposed on the predetermined voltage are input into the drain D of an FET Q1, while a first carrier signal Sc1 is input into the FET Q1's gate G. The FET Q1 thus generates a first mixed signal So1 by mixing the first data signal Ss1 and the first carrier signal Sc1. A predetermined voltage and a second data signal Ss2 superimposed on the predetermined voltage are input into the FET Q2's drain D, while a second carrier signal Sc2 is input into the FET Q2's gate G. The FET Q2 thus generates a second mixed signal So2 by mixing the second data signal Ss2 and the second carrier signal Sc2. A capacitor C5 causes the sources S of the FETs Q1 and Q2 to float for DC and to be grounded for AC.


Find Patent Forward Citations

Ariie, Mitsuo. (1999). Mixer for mixing carrier signals and data signals (U.S. Patent No. 5973576). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/5973576

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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