Obtaining accurate on-chip time-constants and conductances

Abstract

A bias circuit for obtaining accurate on-chip time constants and resistances. The bias circuit includes a constant-g.sub.m bias circuit and feedback loop circuit. The constant-g.sub.m bias circuit has a mos transistor device and a variable resistor device which are arranged so that the trandsconductance of the transistor device is dependent upon the resistance of the resistor device. The constant-g.sub.m bias circuit generates a bias output signal that is a function of the trandsconductance of the transistor device. The feedback loop circuit includes signal generation means responsive to the bias output signal for generating a signal that is a function of the bias signal. The loop circuit further includes a comparison means for comparing the generated signal to a known external frequency reference, and an output that is operatively connected to the variable resistor device for adjusting the value of the variable resistor device until the generated signal matches the external reference signal. Also provided is a variable resistor device for use in a loop circuit (including the present bias circuit). The resistor device includes an analog-controlled resistor device and a digitally-controlled resistor device. The analog-controlled resistor device is adjusted in response to variations occurring in a control signal between a maximum voltage and a minimal voltage. The digitally-controlled resistor is adjusted in discrete steps whenever the control voltage reaches the maximum or minimum voltage, after which the control voltage is forced to a value approximately half-way between the minimum and maximum voltage.